Details About Stages Compiler

 In this book, our focus will be primarily on the compiler proper, which is the most interesting component in the toolchain. The compiler itself can be divided into several stages: 

by clicking the diagram the names will be clearly visible.
  
•The scanner consumes the plain text of a program and groups together individual characters to form complete tokens. This is much like grouping characters into words in a natural language.

.•The parser consumes tokens and groups them together into complete statements and expressions, much like words are grouped into sentences in a natural language. The parser is guided by a grammar which states the formal rules of composition in a given language. 

The output of the parser is an abstract syntax tree (AST) that captures the grammatical structures of the program. The AST also remembers where in the source file each construct appeared, so it is able to generate targeted error messages if needed.

•The semantic routines traverse the AST and derive additional meaning (semantics) about the program from the rules of the language and the relationship between elements of the program. For example, we might determine that x + 10 is a float expression by observing the type of x from an earlier declaration, then applying the language rule that addition between int and float values yields a float. After the semantic routines, the AST is often converted into an intermediate representation (IR) which is a simplified form of assembly code suitable for detailed analysis.

•One or more optimizers can be applied to the intermediate representation, in order to make the programs smaller, faster, or more efficient. Typically, each optimizer reads the program in IR format and then emits the same IR format, so that each optimizer can be applied independently, in arbitrary order.

•Finally, a code generator consumes the optimized IR and transforms it into a concrete assembly language program. Typically, a code generator must perform register allocation to effectively manage the limited number of hardware registers, and instruction selection and sequencing to order assembly instructions. in the most efficient form.

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